With the consumer demand for richer content and its resultant , increasing high data bandwidth continuing to drive communications systems, coding for error control has become extraordinarily important. One way to improve the bit error rate (BER), while maintaining high data reliability, is to use an error correction technique like the Viterbi algorithm.
Originally conceived by Andrew Viterbi as an error-correction scheme for noisy digital communication, the Viterbi algorithm provides an efficient method for forward error correction (FEC) that improves channel reliability. Today, it is used in many digital communications systems in applications as diverse as CDMA and GSM digital cellular, dial-up modems, satellite, deep-space communications and 802.11 wireless LANs. It is also commonly used in speech recognition, keyword spotting and computational linguistics.
Given the increasing need for an error correction technique like the Viterbi algorithm, it has
become critical for engineers to more fully understand what the technique is and how it can best
be used in today's digital communications systems.
With this feature, readers will come away with an understanding of how the Viterbi algorithm works and how to execute a real-world implementation of the Viterbi algorithm on the CEVA-TeakLite-III, a dual-MAC, high-performance fixed-point DSP.
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About the Author
Shai Shpigelblat is manager of processor and core architectures at CEVA. He has nine years of experience in the electronic and silicon industry. In his rule, Mr. Shpigelblat is responsible for defining and managing the wireless application processors such as CEVA-XC161, CEVAXC321
and also various general purpose processors such as CEVA-TeakLite-III and CEVAX1641.
Previously, Mr. Shpigelblat worked at DSP Group, started at 2000 as a VLSI design engineer. Mr. Shpigelblat holds a B.Sc. in Nuclear and Electrical Engineering from the Beer-Sheva University.