Microcontroller 8051Input/output Pins, Ports & Circuits Rohith.P.N IV th Sem ECE ‘B’ Sec
• As we know Microprocessor doesnt have inbuilt Input/output ports.• It must add an additional chip to interface with the external circuitry/devices.• This disadvantage is overcome by the Microcontroller 8051.• MC 8051 has inbuilt I/O ports/circuits.• This helps the MC 8051 to connect with the external devices/memory etc..
Pin details of MC 8051The Microcontroller 8051 has 40 Pins.I/O Port 0 Pins 32-37I/O Port 1 Pins 1-8I/O Port 2 Pins 21-28I/O Port 3 Pins 10-17Pin 40 - VccPin 20 - GndPin 19 & 18 – XTAL1 & XTAL2Pin 9 – ResetPin 31 – EA (External Access)Pin 29 – PSEN ( Program Store Enable)Pin 30 – ALE (Address Latch Enable)
• Vcc（pin 40）： – Vcc provides supply voltage to the chip. – The voltage source is +5V.• GND（pin 20）：ground• XTAL1 and XTAL2（pins 19,18）
• RST（pin 9）：reset – It is an input pin and is active high（normally low）. • The high pulse must be high at least 2 machine cycles. – It is a power-on reset. • Upon applying a high pulse to RST, the microcontroller will reset and all values in registers will be lost. • Reset values of some 8051 registers
RESET Value of Some 8051 Registers:Register Reset ValuePC 0000ACC 0000B 0000PSW 0000SP 0007DPTR 0000RAM are all zero.
• /EA（pin 31）：external access – There is no on-chip ROM in 8031 and 8032 . – The /EA pin is connected to GND to indicate the code is stored externally. – /PSEN ＆ ALE are used for external ROM. – For 8051, /EA pin is connected to Vcc. – “/” means active low.• /PSEN（pin 29）：program store enable – This is an output pin and is connected to the OE pin of the ROM.
• ALE（pin 30）：address latch enable – It is an output pin and is active high. – 8051 port 0 provides both address and data. – The ALE pin is used for de-multiplexing the address and data by connecting to the G pin of the 74LS373 latch.• I/O port pins – The four ports P0, P1, P2, and P3. – Each port uses 8 pins. – All I/O pins are bi-directional.
• The 8051 has four I/O ports – Port 0 （pins 32-39）：P0（P0.0～P0.7） – Port 1（pins 1-8） ：P1（P1.0～P1.7） – Port 2（pins 21-28）：P2（P2.0～P2.7） – Port 3（pins 10-17）：P3（P3.0～P3.7） – Each port has 8 pins. • Named P0.X （X=0,1,...,7）, P1.X, P2.X, P3.X • Ex：P0.0 is the bit 0（LSB）of P0 • Ex：P0.7 is the bit 7（MSB）of P0 • These 8 bits form a byte.• Each port can be used as input or output (bi-direction).
Port 0 :-• When used as input,a ‘1’ must be written to corresponding port latch• Used as an output,’0’ must be be programmed• Logic ‘1’ in address bit will turn Upper FET on & lower FET off• After address has formed & latched into External circuitry by ALE pulse,the External Bus is turned ON• Port 0 now reads data from External Memory• Port 0 pins can be accessed by address P0.0,P0.1,….,P0.7• It can also be addressed as AD0,AD1,…….AD7
Port 1 :-• Port 1 pins have no Dual functions• If used as input a ‘1’ is written to latch which turns upper FET on• Used as output,lower FET is On & the Pullup is Off• Output latch is directly connected to gate of Lower FET• Port 1 can be accessed as P1.0,P1.1,. . . . .P1.7
Port 2 :-• It can be used as i/p or o/p which is similar in operation of Port 1• The alternate use of port 2 is to supply a high-order address byte in conjunction with port 0 low-order byte to address external memory• Port 2 latches remain stable when External Memory is addressed• They do not have to be turned around (Set to 1) For Data i/p as in Port 0• It can be accessed as P2.0,P2.1,. . . . . ,P2.7
Port 3 :-• It is similar to port 1,but has alternate Uses• Each pin may be individually Programmed as I/O or for alternate Functions as shown Pin Alternate Use SFR P3.0-RXD Serial data input SBUF P3.1-TXD Serial data Output SBUF P3.2-INT0 External interrupt 0 TCON.1 P3.3-INT1 External interrupt 1 TCON.3 P3.4-T0 External timer 0 input TMOD P3.5-T1 External timer 1 input TMOD P3.6-WR External Memory Write Pulse - P3.7-RD External Memory Read Pulse -
Writing “1” to Output Pin P1.X Read latch Vcc TB2 Load(L1) 2. output pin is1. write a 1 to the pin Vcc 1 P1.X Internal CPU D Q bus P1.X pin 0 output 1 Write to latch Clk Q M1 TB1 Read pin 8051 IC
Writing “0” to Output Pin P1.X Read latch Vcc TB2 Load(L1) 2. output pin is1. write a 0 to the pin ground 0 P1.X Internal CPU D Q bus P1.X pin 1 output 0 Write to latch Clk Q M1 TB1 Read pin 8051 IC
Reading “High” at Input Pin Read latch Vcc 2. MOV A,P1 TB2 external pin=High1. write a 1 to the pin MOV Load(L1) P1,#0FFH 1 1 P1.X pin Internal CPU bus D Q P1.X 0 M1 Write to latch Clk Q TB1 Read pin3. Read pin=1 Read latch=0 Write to latch=1 8051 IC
Reading “Low” at Input Pin Read latch Vcc 2. MOV A,P1 TB2 1. write a 1 to the pin Load(L1) external pin=Low MOV P1,#0FFH 1 0 P1.X pin Internal CPU bus D Q P1.X 0 M1 Write to latch Clk Q TB1 Read pin3. Read pin=1 Read latch=0 Write to latch=1 8051 IC