I am curious if this could work. I have 3 inputs (A,B,C) and I know that Input A takes the longest to calculate.
Is it possible to use single Transistors in place of normal AND Gates so that a signal from A will have less propagation delay (if any?) to reach the Output? How long would the delay be relative to normal AND gates? Can I make this chain as long as I want?
simulate this circuit – Schematic created using CircuitLab
I drew this schematic according to my best understanding of how transistors work. I assume the line between A and Out has to be drained before A signal from A can be interpreted correctly at Out.
If I am wrong please explain why this would not work.
I seems I have confused a lot of people by using the wrong kind of schematic symbols. Just to clarify I am talking about the the kind of transistors that one would find in a CPU, mainly the ALU part.
I have made some adjustments to my previous schematic in order to highlight what I mean. I have removed "EnergyDrain" and instead now use B to drain the current.
These two circuits are supposed do the same thing. I am interested about the AND gate on the left.
As I see it the circuit on the right has less transistors as the circuit on the left and A does not need to trigger a transistor itself. I just don't understand why this design would not be faster than the normal design.
Should I open a new question for this? I am new to this forum so I apologize if I am do not know all the guidlines too well.
Edit2: Fixed symbols in Edit1 as "mkeith" has suggested in the comments.