[Kenneth Finnegan] put up a lengthy primer on PLLs (Phase-Locked Loops). We really enjoyed his presentation (even the part where he panders to Rigol for a free scope… sign us up for one of those too). The concepts behind a PLL are not hard to understand, and [Kenneth] managed to come up with a handful of different demonstrations that really help to drive each point home.
A PLL is made up of three parts: a phase detector, a low pass filter, and a voltage controlled oscillator. It can do really neat things, like multiply clock speed (you see them in beefier chips like the ARM architecture all the time). The experiments seen in the video use a CD4046 chip which has two different types of phase detectors. The two signals displayed on the oscilloscope above compare the incoming clock signal with the output from the VCO. Depending on the type of phase detector used, and the quality of the low-pass filter, these might be tightly synchronized or wildly unstable. Find out why by watching the video embedded after the break.